A Comparative Study of Ultra-Low Voltage Digital Circuit Design

Ultra-Low-Power Digital Circuit Design

Subthreshold source-coupled logic (STSCL) is a logic family that contains a constant bias current in each logic gate. Logic operation is based on the steering of this current towards one of two load resistors using subthreshold dierential pairs. STSCL was proposed for its low power consumption due to the small voltage signal swing, as well its suitability for congurable circuits. In this work, ...

A Study on Ultra-Low Power and Large-Scale Design of Digital Circuit for Wireless Communications

Digital Ultra Low Voltage High Speed Logic

Low power is becoming more and more crucial and in many aspects becoming the number 1 priority when designing new applications. Ultra low voltage CMOS is an approach for producing very low-power CMOS circuits by reducing the supply voltage to several hundred millivolts [1, 2]. To maintain good performance at low supply voltages, the threshold voltages of MOS transistors must also be reduced [3–...

Circuit Sizing and Supply-Voltage Selection for Low-Power Digital Circuit Design

This paper analyzes energy minimization of digital circuits operating at supply voltages above threshold and in the sub-threshold region. Circuit sizing and supply-voltage selection are simultaneously analyzed to determine where the minimum energy solution occurs. In this work we address the effects of architectural modifications on the design choices in different regions of operation. Two new ...

Design Strategies for Ultra-Low Voltage Circuits

Energy efficiency is an emerging metric for the quality of integrated circuit designs. Applications ranging from wireless sensor networks to RFID tags to embedded microprocessors require extremely low power consumption to maintain good battery life. We advocate the use of aggressively scaled supply voltages in such applications to maximize energy efficiency. This paper reviews our recent progre...